CMSC 421 Operating Systems Lecture Notes (c) 1993 Howard E. Motteler Paging ------- Idea: divide virtual address space into _pages_, which can map to non-contiguous locations in physical memory virt addr phys addr space space ------- ------ P2 P2 ------- ------ P1 P0 ------- ------ P0 xx ------- ------ P1 ------ In paging: - divide physical memory into equal sized _frames_ - divide virtual memory into _pages_ - pages and frames are the same size (a power of 2) - frames hold pages The mapping of pages to frames is via a _page table_: virt mem phys mem (pages) (frames) ------- page ------ P2 table P1 4 ------- 2 | 3 ------ P1 1 | 4 P2 3 ------- 0 | 1 ------ frame P0 2 numbers ------- ------ P0 1 ------ 0 ------ Virtual addresses are split into two parts: high bits low bits ----------------------------- | page number | page offset | ----------------------------- Page number is used as an index into the page table To generate a physical address: virtual address ----------------------------- | page number | page offset |--------------| ----------------------------- | | | | |---------| V | |---------| ---------------------------- |-->| frame # |---->| frame no. | frame offset | |---------| ----------------------------- |---------| physical address page table Page number is an _index_ into page table Example with 3 + 3 bit fields: virt address 0 1 1 1 0 1 3 5 page table 4. 1 1 1 (7) 3. 0 0 1 (1) 2. 0 1 0 (2) 1. 0 0 0 (0) 0. 1 0 0 (4) phys address 0 0 1 1 0 1 1 5 Page table should be in fast memory (more on this later) Advantages of Paging --------------------- No external fragmentation (no wasted frames) Internal fragmentization is about 1/2 page per process With pages, don't need _limit registers_ -- an address out of range corresponds to an entry not in the page table Processes can share read-only pages (like executables) Pages can have different protections, e.g. some (like executables) can be read only Pages and Process Scheduling ----------------------------- The scheduler keeps a list of _free frames_ When a job is created, if it needs n pages of memory, it is given n frames. When a job finishes, its frames go back to a free list A running job can change size--pages can be added or freed Each process has its own page table, possibly in PCB May keep page table in main memory with a pointer in PCB When process is run, some or all of the page table may be loaded into fast registers Memory Access Time ------------------- Problem: each virtual memory access takes 2 physical accesses - one to the frame table - one to desired physical address If the page table is not too big, it may be possible to keep it a special set of registers. But even with only 1 meg of ram, we would have 1 K pages of size 1 K One solution: use a small set of `associative registers' to hold part of the page table: key value (pages) (frames) _______________ |______|______| |______|______| |______|______| page --> |______|______| number |______|______| |______|______| |______|______| The page number is compared with all the keys very quickly, with special hardware If the page is found in the table, the corresponding frame is returned, else `no match' is reported If page is _not_ in assoc. memory, - look page up in page table - add a page/frame pair to assoc. reg's If assoc. reg's are full, some entry must be deleted Best strategy: delete _least used_ entry; must be simple enough to implement in hardware Associative memory performance ------------------------------- Hit ratio is % of time that a page is found in assoc. reg's 75% hit ratio means 3 out of 4 page accesses are thru ARs Suppose - AR access takes a ns - Phys mem access takes m ns - hit ratio (as a fraction) is h Then `effective access time' is approximately a + h m + (1 - h) 2 m Larger h and small a (and m) mean faster access time